Systems on chip integrate processors, memory and peripherals with on-chip buses.
SoCs integrate CPU cores, GPU, memory controllers, accelerators, peripherals and interconnect (AXI/AHB, NoC) on one die. Design includes IP reuse, power domains, clock trees, security zones and hardware/software co-design. Verification dominates effort.
A phone SoC contains CPU, GPU, ISP, modem and NPU.
SoCs combine processors, memory and peripherals on one chip, which makes compact, low-power products possible.
Systems on chip integrate processors, memory and peripherals with on-chip buses.
SoCs combine processors, memory and peripherals on one chip, which makes compact, low-power products possible.
An interconnect such as AMBA that links processors, memories and peripherals inside an SoC, managing data and address traffic.
Integration reduces the number of separate parts, board area and assembly steps, so the cost per product falls.
Typical applications include building a phone processor with CPU, GPU and modem on one die, designing a wearable with an MCU and radio in one package and integrating a motor controller with an ARM core and peripherals on a single chip.
Study "Phase-locked loops" first (topic 99 of 104 in Electronics & Embedded). It covers the groundwork this topic builds on.
Heterogeneous cores big.LITTLE. Memory hierarchy. Boot ROM.
A phone SoC contains CPU, GPU, ISP, modem and NPU.
The next topic is "Low-power design techniques", which builds directly on this one.
It is classed as Advanced in Electronics & Embedded (topic 100 of 104). It is an advanced topic. It assumes you are comfortable with the intermediate topics in Electronics & Embedded.
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